In this tutorial series, I am going to share about how to build a system that consists of FPGA and Embedded Linux web application. We are going to build a hardware accelerator for calculating greatest common divisor (GCD) on the FPGA. The GCD core is connected to the CPU ARM Cortex-A9 through the AXI4-Lite bus. On top of the Linux, we are going to build an embedded web application based on Python Flask web framework. The system is illustrated in the following block diagram.
At the end of this tutorial, you will be able to build the following system. You are going to learn how to develop a system that consists of both hardware and software stack. This kind of methodology is usually called hardware/software (HW/SW) co-design. The hands-on skill that you are going to learn is applicable for your future project, such as IoT or Edge AI.
Even though I use ZYBO board in this tutorial, you can use other Zynq boards as well. In general, once you understand the concept in this tutorial, you can apply that to any FPGA board. There are several Zynq boards that already come with pre-build Linux OS. So, you just need to follow the setup instructions of the boards. There are several alternative boards that you may want to check out:
- PYNQ-Z1 or PYNQ-Z2: It comes with pre-build Linux OS and also Python framework for interacting with the PL (FPGA). It can also support interrupt and DMA (Python API). So, you can easily (no need to know about kernel) exploit the benefits of FPGA and microprocessors to build more capable and exciting embedded systems. This board is recommended for you who want to start developing machine learning/deep learning/computer vision on FPGA.
- STEMlab Red Pitaya: It comes with high speed DAC and ADC for RF communication. It also comes with pre-installed Linux OS and also has built-in oscilloscope software. So, basically, you can use this board as a portable oscilloscope, logic analyzer, etc. This board is recommended for you who want to start developing baseband processor for RF communications on FPGA.
This tutorial is divided into several parts as follows. So, let’s get started!
- Part 1 – RTL Simulation of the GCD Core
- Part 2 – Wrap the GCD Core with AXI4-Lite Interface
- Part 3 – Create a Testbench for Simulating the AXI4-Lite Interface
- Part 4 – Test the GCD Core with Bare Metal Application
- Part 5 – Performance Comparison of the GCD Core
- Part 6 – Configure the Linux System, Ethernet Connection, and Python Libraries
- Part 8 – Embedded Web Server Development using Python and Flask Framework
- [Source Code] Get the full source code: handsonembedded repository.
- P. P. Chu, Embedded SoPC Design with Nios II Processor and Verilog Examples, Wiley, 2012.
- L. H. Crockett, R. A. Elliot, M. A. Enderwitz, and R. W. Stewart, The Zynq Book, 2015.
- ARM, AMBA AXI and ACE Protocol Specification, 2011.
- [Video] The Development Channel, Embedded Linux with FPGA, 2016.
- [Video] Microelectronic Systems Design Research Group, ZYNQ, 2015.
In this tutorial, I assume you already know how to use Xilinx Vivado IDE and Xilinx SDK (at least know how to build a simple project like LED blinking). If you are completely new to Xilinx Vivado IDE and Xilinx SDK, I would recommend you to check out this tutorial for the set-by-step hands-on guide on how to use the Vivado. Also, for more premium content, you may want to check out the following course (please follow this link to the course). The course also covers the AXI4-Stream protocol.
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