Test the GCD Core with Bare Metal Application

Introduction

In part 1-3, we have designed the RTL of the GCD core, counter, and AXI4-Lite wrapper. In this part, we are going to create the system design that integrates those RTL blocks with the PS (CPU ARM Cortex-A9). Then, we are going to synthesize and implement the design. Finally, we are going to create a bare-metal C program for testing our GCD core. In this part, we focus on the following part of the full system diagram.

In this tutorial, I assume you already know how to use Xilinx Vivado IDE and Xilinx SDK (at least know how to build a simple project like LED blinking). If you are completely new to Xilinx Vivado IDE and Xilinx SDK, I would recommend you to check out this tutorial for the set-by-step hands-on guide on how to use the Vivado. Also, for more premium content, you may want to check out the following course. The course also covers the AXI4-Stream protocol.

Zynq System Design

First of all, you should create a Vivado design. Then, add the AXI4-Lite GCD and AXi4-Lite performance counter (we will use this in the next tutorial).  Optionally, you may want to add AXI GPIO as well. I sometimes use this just for sanity check.

The following figure shows the complete system diagram. Don’t forget to configure the PS with the default config file ZYBO_C.tcl.

After that, assign addresses to every memory mapped block (AXI4-Lite GCD, AXI4-Lite performance counter and AXI GPIO). We are going to need this address when we develop the C program. In my case, I set the address to the following:

Don’t forget to add and modify the constraint file (ZYBO_master.xdc) if you want to use the AXI GPIO, i.e. connect it to the LEDs. Finally, runs the synthesis, implementation, and generate the bitstream.

Xilinx System Debugger

Xilinx System Debugger (XSDB) (or you might want to use Xilinx Microprocessor Debugger (XMD)) is a tool for testing and debugging your design (PL and PS) without writing any C program. We can use this to verify the functionality of the GCD core after synthesis and implementation.

Basically, you can open this tool from Xilinx SDK. Go to Xilinx Tools and select Launch Shell. Type xsdb to start. Then Select the target, which is the core #0 of the ARM Cortex-A9. After that, you can use mwr command to write data to the GCD core and mrd to read data from GCD core. In the following example, we calculate the gcd(35, 25):

You can also get how many clock cycles does it takes to do this GCD operation by reading the register at address 0x41000010.

C Program

Even though our goal is to create a program on top of the Linux OS, it is a good practice especially for beginner to test and debug the hardware with a bare-metal C program. Because, when you add OS to your system, it becomes quite complex and sometimes quite difficult to debug.

So, in this section, we focus on how to build a bare-metal C program for testing the GCD core. The following listing shows the C program. It verifies the functionality of the hardware GCD core.

This is how the C program works:

  • First, in line 7, declare a pointer that will be initialized with the physical address of the AXI4-Lite GCD.
  • Then, in line 12, initialize the pointer with the physical address of the AXI4-Lite GCD (0x41000000). Your address may be different. Check your’s in the address editor of your Vivado project.
  • In line 15,-16, enter the input A and B of the GCD by writing them to register A and B.
  • In line 17, write one to the START bit in order to initiate the GCD operation.
  • In line 18, wait using polling method till the READY flag is one. It indicates that the GCD operation is finished.
  • Finally, in line 19, read the result from register R, and print it to the SDK terminal.

This code is also available in the repository.

The following figure shows the result. The results from GCD core operation are printed on the SDK terminal. It uses UART communication between ZYBO and host PC.

Summary

In this tutorial, you have build the Zynq system design, run the synthesize and implementation process. You have learned how to debug the PL and PS using the XSDB. Finally, you have learned how to create a bare-metal C program that interacts with the GCD core in the FPGA.

Next: Performance Comparison of the GCD Core

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